Novel Encryption Methods Linked With Protective Chip
Larta Institute
posted on 10/10/2007
Technology Description:
UCSD researchers have developed three separate methods for high-speed encryption, including:
1. Ciphers having the property that they can work with keys of variable length, without the need to redesign the algorithm for encrypting and decrypting as the key changes size. They are orders of magnitude faster than any other known method with provable security. They can be implemented in a highly parallelized manner in hardware, thus the speed of encryption/decryption will be constant and independent of key length
2. Ciphers having the property that if some errors (intentional or non-intentional) occur during the communication, the resulting decryption will be totally destroyed, and the rest of the communication stream will not self-synchronize.
3. Cipher that are orders of magnitude faster than any other known method with provable security. This method can use pipelined computations, so that the speed of encryption/decryption will be constant and independent of key length.
UCLA researchers have developed a novel chip design whereby a logic style is developed in which every logic gate consumes constant power independent of the input signal. It is called Wave Dynamic Differential Logic (WDDL) and is DPA resistant. Moreover, a routing scheme is developed that provides constant load capacitance for true and false outputs of the WDDL gates which results in constant power cost. Using these innovations, a design methodology that is suitable for integration in a common automated standard cell ASIC or FPGA design flow is developed. This prevents hacking by security chips leaking information through power consumption, timing, and electro-magnetic radiation although they are secure against mathematical attacks. One of the most effective side channel attacks to the encryption ICs is the differential power analysis attack. In DPA, the attacker measures the power consumption of the chip while it encrypts and by doing a statistical analysis the attacker can extract the secret-key.
Advantages
One set of technologies are novel encryption methods; and the other technology is a chip design to protect encryption. The combination may provide unique advantages and constitute the next stage of encryption.
File Number: B-203
Other Information:
Intellectual Property:
These technologies are protected by at least two US/foreign Patent Applications: WO 2006/045114 and PCT/US05/04877; other rights may also pertain.
Additional Information:
Technology Bundling Project
Funded by Ewing Marion Kauffman Foundation and administered by Larta Institute, the Project’s expert panels examined technologies from 18 Southern California research centers and identified inventions which could be synergistically combined for unique solutions. These Linked-Solutions are now being offered for license, with reduced red tape and “1-stop technology shopping”.
| Patent Number(s): | 2006/045114 |
|---|
This innovation currently is not available for online licensing. Please contact the case manager at Larta Institute for more information.
Find more innovations
