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Multiple-Input Relay
University of California System: University of California, Berkeley
posted on 12/05/2011
Nano-electro-mechanical relay technology has been proposed as a potential solution to overcome the fundamental energy-efficiently limit of CMOS technology because it offers the ideal characteristics of zero off-state leakage current and abrupt on off switching behavior which provide for zero static power consumption and aggressive supply voltage (V’DD) scaling. Various digital integrated-circuit (IC) building blocks (logic. memory. and clocking structures) implemented purely with micro-electro-mechanical relays already have been demonstrated recently.
Relay designs that incorporate multiple input (gate) electrodes and multiple pairs of output (source/drain) electrodes enable more compact implementation of digital ICs at no incremental process cost.
Researchers at he University of California, Berkeley have designed and created the first functional prototype multi-electrode relays, and have demonstrated their capability for versatile and more compact implementation of digital logic circuitry.
Suggested Uses
- Realize zero-leakage (ultra-low-power) integrated circuits more efficiently
Advantages
- Lower cost per function
- More compact implementation of relay-based integrated circuits
File Number: 21841
| Copyright: | ©2011, The Regents of the University of California |
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This innovation currently is not available for online licensing. Please contact Curt Theisen at University of California System: University of California, Berkeley for more information.
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